ALINX AC7Z020 ZYNQ7000 FPGA Atina'e Komiti
Fa'amatalaga o oloa
O le ZYNQ7000 FPGA Development Board o se laupapa atinaʻe e faʻaalia ai le XC7Z100-1CLG400I chip, o se vaega o le ZYNQ7000 series. O loʻo i ai le ARM lua-core CortexA9 faʻapipiʻi talosaga faʻapipiʻi faʻatasi ma le saoasaoa o le uati e oʻo atu i le 800MHz, 256KB i luga o le chip RAM, ma le faʻaogaina o fafo e lagolagoina le 16/32 bit DDR2, DDR3 interface. E iai fo'i i le laupapa le lagolago e lua Gigabit NIC, lua feso'ota'iga USB2.0 OTG, lua feso'ota'iga pasi CAN2.0B, lua SD card, SDIO, MMC fa'atonutonu fa'atasi, 2 SPI, 2 UARTs, 2 I2C feso'ota'iga, ma 4 paipa o 32bit GPIO. O le laupapa o loʻo i ai se laupapa autu (AC7Z010) e faʻaogaina ai le lua Micron's MT41K128M16TW-107 DDR3 kiliva faʻatasi ma le tuʻufaʻatasia o le 256MB ma se pasi faʻamatalaga lautele o le 32-bit. O loʻo iai foʻi i le laupapa faʻaoga LED, ki faʻaoga, ulutala faʻalautele, JTAG debug uafu, ma le sapalai eletise.
Fa'atonuga o le Fa'aaogaina o Mea
Mo le fa'aogaina o le ZYNQ7000 FPGA Development Board, mulimuli i laasaga nei:
- Faʻafesoʻotaʻi le eletise i le laupapa.
- Faʻafesoʻotaʻi le laupapa i lau komepiuta e faʻaaoga ai se uaea USB.
- Fa'apipi'i so'o se ta'avale talafeagai mo le laupapa i lau komepiuta.
- Tatala lou siosiomaga atina'e polokalame ma fai se galuega fou.
- Fa'atulaga au fa'atulagaga o galuega e fa'aoga ai le ZYNQ7000 FPGA Development Board.
- Tusi lau code ma tuufaatasia.
- Tuʻu atu le code tuʻufaʻatasia i le laupapa e faʻaaoga ai le JTAG debug uafu.
- Su'e lau code i luga o le laupapa.
Fa'aaliga: Va'ai i le tusi lesona mo le fa'amatalaga auiliili i foliga ma le fa'aogaina o le laupapa.
Fa'amaumauga Fa'aliliuga
| Fa'aliliuga | Aso | Fa'asa'oloto e | Fa'amatalaga |
| Faʻaaliga 1.0 | 2019-12-15 | Rachel Zhou | Fa'asalalauga Muamua |
AC7Z010 laupapa autu
AC7Z010 laupapa autu Folasaga
- AC7Z010 (fa'ata'ita'iga laupapa autu, tutusa i lalo) laupapa autu FPGA, ZYNQ chip e fa'avae i le XC7Z010-1CLG400I o le kamupani XILINX ZYNQ7000 faasologa. O le polokalama PS a le ZYNQ chip e tuʻufaʻatasia ai le ARM CortexTM-A9 processors, AMBA® fesoʻotaʻiga, mafaufauga i totonu, fesoʻotaʻiga i fafo ma faʻaoga. O le FPGA o le ZYNQ chip o loʻo i ai le tele o sela faʻaoga faʻaogaina, DSP ma le RAM i totonu.
- O lenei laupapa autu e faʻaaogaina lua meataalo a le Micron MT41K128M16TW-107 DDR3, o ia mea taʻitasi e iai le malosi o le 256MB; e tu'ufa'atasia meataalo DDR e lua e fausia ai se 32-bit data pasi lautele, ma le taimi o le faitau ma tusitusi fa'amaumauga i le va o le ZYNQ ma le DDR3 E o'o i le 533Mhz; e mafai e lenei faatulagaga ona fetaui ma manaʻoga o le faʻaogaina o faʻamaumauga o faʻamaumauga maualuga-bandwidth
- Ina ia mafai ona faʻafesoʻotaʻi ma le laupapa vaʻavaʻa, o fesoʻotaʻiga laupapa e lua o lenei laupapa autu e faʻalauteleina ma ports USB i le itu PS, Gigabit Ethernet interfaces, SD card slot, ma isi ports MIO o totoe (48). Faʻapea foʻi ma toetoe o ports IO uma (100) o BANK13 (naʻo AC7Z010), BAN34 ma BANK35 i le itu PL, o le IO maualuga o le BANK34 ma le BANK35 e mafai ona tuʻuina atu e ala i le vaʻavaʻa laupapa e faʻafetaui manaoga o tagata faʻaoga mo fesoʻotaʻiga tulaga eseese. Mo tagata faʻaoga e manaʻomia le tele o IO, o lenei laupapa autu o le a avea ma filifiliga lelei. Ma le vaega IO sootaga, le ZYNQ pu i le atinaʻe i le va o le umi tutusa ma le faagasologa o eseesega, ma le tele o le laupapa autu e na o le 35 * 42 (mm), lea e fetaui lelei mo le atinaʻe lona lua.
ZYNQ Chip
O le FPGA core board AC7Z010 fa'aoga le Xilinx's Zynq7000 series chip, module XC7Z010-1CLG400I. O le masini PS o loʻo tuʻufaʻatasia ai le ARM Cortex™-A9 processors e lua, AMBA® fesoʻotaʻiga, mafaufauga i totonu, fesoʻotaʻiga manatua fafo ma peripheral. O nei peripherals e masani ona aofia ai le USB bus interface, Ethernet interface, SD / SDIO interface, I2C bus interface, CAN bus interface, UART interface, GPIO etc. O le PS e mafai ona galue tutoatasi ma amata i le mana i luga pe toe setiina. Ata 2-2-1 o lo'o fa'amatala auiliiliina ai le Ata atoa o poloka o le ZYNQ7000 Chip.
Ole vaega autu ole vaega ole PS e fa'apea:
- ARM lua-autu CortexA9-fa'avae talosaga fa'aoga, fausaga ARM-v7, e o'o atu i le 800MHz
- 32KB laʻasaga 1 faʻatonuga ma faʻamaumauga faʻamaumauga mo le PPU, 512KB tulaga 2 faʻaoga 2 CPU sea
- I luga o le chip boot ROM ma le 256KB on-chip RAM
- Faʻamatalaga faʻapipiʻi fafo, lagolago 16/32 bit DDR2, faʻaoga DDR3
- E lua Gigabit NIC lagolago: fa'atasi-fa'atasi DMA, GMII, RGMII, SGMII atina'e
- E lua USB2.0 OTG fa'afeso'ota'i, ta'itasi e lagolago i pona e 12
- E lua feso'ota'iga pasi CAN2.0B
- E lua SD card, SDIO, MMC fa'atonuga tutusa
- 2 SPI, 2 UART, 2 I2C fesoʻotaʻiga
- 4 paipa o 32bit GPIO, 54 (32 + 22) pei PS system IO, 64 fesoʻotaʻi i PL
- Feso'ota'iga bandwidth maualuga ile PS ma le PS ile PL
O taʻiala autu o le vaega PL logic e faʻapea:
- Tala Fa'atatau: 28K
- Laupapa su'e-i luga (LUTs): 17600
- Su'e-flops: 35,200
- 18x25MACCs: 80
- poloka RAM: 240KB
- E lua AD converters mo on-chip voltagu, lagona vevela ma e oʻo atu i le 17 faʻasalalauga faʻasalalauga fafo, 1MBPS
- XC7Z100-1CLG400I va'a saosaoa vasega o le -1, alamanuia vasega, afifi o le BGA400, pine pitch o 0.8mm le fa'amatalaga fa'ata'ita'iga fa'ata'ita'iga fa'apitoa o le fa'asologa o le ZYNQ7000 o lo'o fa'aalia i le Ata 2-2-2
DDR3 DRAM
- O le FPGA core board AC7Z010 ua faʻapipiʻiina i lua Micron DDR3 SDRAM meataalo (1GB i le aofaʻi), faʻataʻitaʻiga MT41K128M16TW-107 (Faʻatasi ma Hynix
- H5TQ2G63AFR-PBI). Ole lautele ole pasi ole DDR3 SDRAM ole 32bit. DDR3 SDRAM o lo'o fa'agaoioia i le maualuga o le saoasaoa o le 533MHz (fa'amaumauga fa'amaumauga1066Mbps). O le DDR3 memory system e fesoʻotaʻi saʻo i le atinaʻe manatua o le BANK 502 o le ZYNQ Processing System (PS). O le faʻatulagaga faʻapitoa o le DDR3 SDRAM o loʻo faʻaalia i le Laulau 2-3-1 i lalo:
| Numera Bit | Chip Model | Malosiaga | Falegaosimea |
| U8,U9 | MT41K128M16TW-107 | 256M x 16bit | Micron |
Laulau 2-3-1: Fa'atonu DDR3 SDRAM
O le mamanu o meafaigaluega a le DDR3 e manaʻomia ai le faʻamaoni o le faʻamaoniga. Ua matou mafaufau atoatoa i le faʻatusatusaina o le tetee / faʻamaufaʻailoga, faʻatautaia le faʻaogaina o le impedance, ma le faʻatonutonuina o le umi i le mamanu matagaluega ma le PCB mamanu e faʻamautinoa ai le maualuga-saosaoa ma le mautu o le DDR3.
DDR3 DRAM pine pine:
| Igoa Faailoga | ZYNQ Pin Igoa | ZYNQ Pin Numera |
| DDR3_DQS0_P | PS_DDR_DQS_P0_502 | C2 |
| DDR3_DQS0_N | PS_DDR_DQS_N0_502 | B2 |
| DDR3_DQS1_P | PS_DDR_DQS_P1_502 | G2 |
| DDR3_DQS1_N | PS_DDR_DQS_N1_502 | F2 |
| DDR3_DQS2_P | PS_DDR_DQS_P2_502 | R2 |
| DDR3_DQS2_N | PS_DDR_DQS_N2_502 | T2 |
| DDR3_DQS3_P | PS_DDR_DQS_P3_502 | W5 |
| DDR3_DQS4_N | PS_DDR_DQS_N3_502 | W4 |
| DDR3_D0 | PS_DDR_DQ0_502 | C3 |
| DDR3_D1 | PS_DDR_DQ1_502 | B3 |
| DDR3_D2 | PS_DDR_DQ2_502 | A2 |
| DDR3_D3 | PS_DDR_DQ3_502 | A4 |
| DDR3_D4 | PS_DDR_DQ4_502 | D3 |
| DDR3_D5 | PS_DDR_DQ5_502 | D1 |
| DDR3_D6 | PS_DDR_DQ6_502 | C1 |
| DDR3_D7 | PS_DDR_DQ7_502 | E1 |
| DDR3_D8 | PS_DDR_DQ8_502 | E2 |
| DDR3_D9 | PS_DDR_DQ9_502 | E3 |
| DDR3_D10 | PS_DDR_DQ10_502 | G3 |
| DDR3_D11 | PS_DDR_DQ11_502 | H3 |
| DDR3_D12 | PS_DDR_DQ12_502 | J3 |
| DDR3_D13 | PS_DDR_DQ13_502 | H2 |
| DDR3_D14 | PS_DDR_DQ14_502 | H1 |
| DDR3_D15 | PS_DDR_DQ15_502 | J1 |
| DDR3_D16 | PS_DDR_DQ16_502 | P1 |
| DDR3_D17 | PS_DDR_DQ17_502 | P3 |
| DDR3_D18 | PS_DDR_DQ18_502 | R3 |
| DDR3_D19 | PS_DDR_DQ19_502 | R1 |
| DDR3_D20 | PS_DDR_DQ20_502 | T4 |
| DDR3_D21 | PS_DDR_DQ21_502 | U4 |
| DDR3_D22 | PS_DDR_DQ22_502 | U2 |
| DDR3_D23 | PS_DDR_DQ23_502 | U3 |
| DDR3_D24 | PS_DDR_DQ24_502 | V1 |
| DDR3_D25 | PS_DDR_DQ25_502 | Y3 |
| DDR3_D26 | PS_DDR_DQ26_502 | W1 |
| DDR3_D27 | PS_DDR_DQ27_502 | Y4 |
| DDR3_D28 | PS_DDR_DQ28_502 | Y2 |
| DDR3_D29 | PS_DDR_DQ29_502 | W3 |
| DDR3_D30 | PS_DDR_DQ30_502 | V2 |
| DDR3_D31 | PS_DDR_DQ31_502 | V3 |
| DDR3_DM0 | PS_DDR_DM0_502 | A1 |
| DDR3_DM1 | PS_DDR_DM1_502 | F1 |
| DDR3_DM2 | PS_DDR_DM2_502 | T1 |
| DDR3_DM3 | PS_DDR_DM3_502 | Y1 |
| DDR3_A0 | PS_DDR_A0_502 | N2 |
| DDR3_A1 | PS_DDR_A1_502 | K2 |
| DDR3_A2 | PS_DDR_A2_502 | M3 |
| DDR3_A3 | PS_DDR_A3_502 | K3 |
| DDR3_A4 | PS_DDR_A4_502 | M4 |
| DDR3_A5 | PS_DDR_A5_502 | L1 |
| DDR3_A6 | PS_DDR_A6_502 | L4 |
| DDR3_A7 | PS_DDR_A7_502 | K4 |
| DDR3_A8 | PS_DDR_A8_502 | K1 |
| DDR3_A9 | PS_DDR_A9_502 | J4 |
| DDR3_A10 | PS_DDR_A10_502 | F5 |
| DDR3_A11 | PS_DDR_A11_502 | G4 |
| DDR3_A12 | PS_DDR_A12_502 | E4 |
| DDR3_A13 | PS_DDR_A13_502 | D4 |
| DDR3_A14 | PS_DDR_A14_502 | F4 |
| DDR3_BA0 | PS_DDR_BA0_502 | L5 |
| DDR3_BA1 | PS_DDR_BA1_502 | R4 |
| DDR3_BA2 | PS_DDR_BA2_502 | J5 |
| DDR3_S0 | PS_DDR_CS_B_502 | N1 |
| DDR3_RAS | PS_DDR_RAS_B_502 | P4 |
| DDR3_CAS | PS_DDR_CAS_B_502 | P5 |
| DDR3_WE | PS_DDR_WE_B_502 | M5 |
| DDR3_ODT | PS_DDR_ODT_502 | N5 |
| DDR3_RESET | PS_DDR_DRST_B_502 | B4 |
| DDR3_CLK0_P | PS_DDR_CKP_502 | L2 |
| DDR3_CLK0_N | PS_DDR_CKN_502 | M2 |
| DDR3_CKE | PS_DDR_CKE_502 | N3 |
QSPI Flash
O le FPGA core board AC7Z010 ua faʻapipiʻiina i le tasi 256MBit Quad-SPI FLASH chip, o le faʻataʻitaʻiga moli o le W25Q256FVEI, lea e faʻaaogaina le 3.3V CMOS vol.tagu tulaga masani. Ona o le natura le mautonu o le QSPI FLASH, e mafai ona faʻaaogaina e avea o se masini taʻavale mo le faiga e teu ai le ata faʻatagata o le faiga. O nei ata e masani ona aofia ai le FPGA bit files, ARM tusi talosaga, ma isi faʻamatalaga faʻaoga files. O faʻataʻitaʻiga faʻapitoa ma faʻamaufaʻailoga fesoʻotaʻi o le QSPI FLASH o loʻo faʻaalia i le Laulau 2-4-1.
| Tulaga | Fa'ata'ita'iga | Malosiaga | Falegaosimea |
| U15 | W25Q256FVEI | 32M Byte | Winbond |
Laulau 2-4-1: QSPI FLASH Fa'amatalaga
QSPI FLASH e fesoʻotaʻi i le GPIO port o le BANK500 i le PS vaega o le ZYNQ chip. I le mamanu faʻatulagaina, o galuega a le GPIO ports o nei pusa PS e manaʻomia ona faʻapipiʻiina e pei o le QSPI FLASH interface. Ata 2-4-1 o loʻo faʻaalia ai le QSPI Flash i le faʻasologa.
Fa'atulaga galuega fa'apipi'i:
| Igoa Faailoga | ZYNQ Pin Igoa | ZYNQ Pin Numera |
| QSPI_SCK | PS_MIO6_500 | A5 |
| QSPI_CS | PS_MIO1_500 | A7 |
| QSPI_D0 | PS_MIO2_500 | B8 |
| QSPI_D1 | PS_MIO3_500 | D6 |
| QSPI_D2 | PS_MIO4_500 | B7 |
| QSPI_D3 | PS_MIO5_500 | A6 |
Fa'atulagaina o le uati
O le AC7Z010 core board e maua ai se uati malosi mo le PS system, ina ia mafai e le PS system ona galue tutoatasi.
PS puna'iga uati faiga
O le ZYNQ chip e maua ai le 33.333333MHz fa'aoga uati mo le vaega PS e ala i le tioata X1 i luga o le laupapa autu. O le fa'aoga o le uati e feso'ota'i i le pine PS_CLK_500 o le va'a ZYNQ BANK500. O lo'o fa'aalia lona ata fa'atusa i le Ata 2-5-1:
Fa'atonuga pine uati:
| Igoa faailo | ZYNQ Pin |
| PS_CLK_500 | E7 |
Paoa sapalai
O le eletise voltage o le AC7Z010 laupapa autu o le DC5V, lea e tuʻuina atu e ala i le faʻafesoʻotaʻi o le laupapa vaʻaia. E le gata i lea, o le malosiaga o le BANK34 ma le BANK35 o loʻo tuʻuina atu foi e ala i le vaʻavaʻa. O le ata faʻataʻitaʻiga o le faʻaogaina o le eletise i luga o le laupapa autu o loʻo faʻaalia i le Ata 2-6-1:
O le FPGA atina'e laupapa e fa'aola e + 5V, ma ua liua i le + 1.0V, + 1.8V, + 1.5V, + 3.3V fa eletise sapalai e ala i le fa DC / DC power chips. O le gaosiga o loʻo i ai nei + 1.0V e mafai ona oʻo atu i le 6A, + 1.8V ma + 1.5V malosiaga o loʻo i ai nei o le 3A, + 3.3V o loʻo i ai nei o le 500mA. O le J29 e iai fo'i pine ta'i 4 e tu'u atu ai le paoa i le FPGA BANK34 ma le BANK35. Ole fa'aletonu ole 3.3V. E mafai e tagata fa'aoga ona suia le malosiaga o le BANK34 ma le BANK35 e ala i le suia o le VCCIO34 ma le VCCIO35 i luga o le va'alele. 1.5V fa'atupuina le VTT ma VREF voltage mana'omia e DDR3 e ala i le TPS51206 a le TI. O galuega a le tufatufaina atu o malosiaga ta'itasi o lo'o fa'aalia i le siata lenei:
| Paoa sapalai | Galuega |
| +1.0V | ZYNQ PS ma PL vaega Autu Voltage |
| +1.8V | ZYNQ PS ma PL vaega ausilali voltage
BANK501 IO voltage |
| +3.3V | ZYNQ Bank0, Bank500, QSIP FLASH
Uati Crystal |
| +1.5V | DDR3, ZYNQ Bank501 |
| VREF,VTT(+0.75V) | DDR3 |
| VCCIO34/35 | Faletupe34, Faletupe35 |
Talu ai ona o le eletise o le ZYNQ FPGA o loʻo i ai le mana-i luga o le faʻasologa o manaʻoga, i le mamanu o le matagaluega, ua matou mamanuina e tusa ai ma manaʻoga manaʻomia o le pu. O le faʻasologa o le mana o le + 1.0V-> + 1.8V-> (+ 1.5 V, + 3.3V, VCCIO) mamanu faʻasolosolo e faʻamautinoa ai le gaioiga masani o le pu. Talu ai ona o tulaga maualuga o le BANK34 ma le BANK35 e faʻamoemoeina e le eletise na tuʻuina atu e le laupapa vaʻavaʻa, o le maualuga o le 3.3V. A e mamanuina le laupapa vaʻaia e tuʻuina atu le malosi VCCIO34 ma VCCIO35 mo le laupapa autu, o le faʻasologa o le eletise e sili atu lemu nai lo + 5V.
AC7Z010 Fuafuaga Fono Matua
Komiti Fa'atonu i Fa'atonu Feso'ota'i pine fa'atonuga
O le laupapa autu o loʻo i ai le aofaʻi o ports faʻalautele maualuga e lua. E fa'aoga lua 120-pin feso'ota'iga va'ava'ai (J29/J30) e fa'afeso'ota'i i le laupapa va'ava'a. Ole va ole PIN ole laupapa ile feso'ota'iga laupapa e 0.5mm, fa'atasi ai, J29 e feso'ota'i ile 5V mana, VCCIO mana fa'aoga, nisi IO fa'ailoga ma JTAG faailoilo, ma ua fesootai J30 i faailoilo IO totoe ma MIO. Ole maualuga ole IO ole BANK34 ma le BANK35 e mafai ona suia e ala ile fetuutuunai o le VCCIO i totonu ole fesoʻotaʻiga, ole maualuga maualuga e le sili atu ile 3.3V. O le AX7Z010 felauaiga laupapa na matou mamanuina o le 3.3V e ala i le faaletonu. Manatua o le IO o le BANK13 e leai
Fa'amauina o le laupapa i le so'oga laupapa J29
| J29 Pin | Fa'ailoga
Igoa |
ZYNQ Pin
Numera |
J29 Pin | Igoa Faailoga | ZYNQ Pin
Numera |
| 1 | VCC5V | – | 2 | VCC5V | – |
| 3 | VCC5V | – | 4 | VCC5V | – |
| 5 | VCC5V | – | 6 | VCC5V | – |
| 7 | VCC5V | – | 8 | VCC5V | – |
| 9 | GND | – | 10 | GND | – |
| 11 | VCCIO_34 | – | 12 | VCCIO_35 | – |
| 13 | VCCIO_34 | – | 14 | VCCIO_35 | – |
| 15 | VCCIO_34 | – | 16 | VCCIO_35 | – |
| 17 | VCCIO_34 | – | 18 | VCCIO_35 | – |
| 19 | GND | – | 20 | GND | – |
| 21 | IO34_L10P | V15 | 22 | IO34_L7P | Y16 |
| 23 | IO34_L10N | W15 | 24 | IO34_L7N | Y17 |
| 25 | IO34_L15N | U20 | 26 | IO34_L17P | Y18 |
| 27 | IO34_L15P | T20 | 28 | IO34_L17N | Y19 |
| 29 | GND | – | 30 | GND | – |
| 31 | IO34_L9N | U17 | 32 | IO34_L8P | W14 |
| 33 | IO34_L9P | T16 | 34 | IO34_L8N | Y14 |
| 35 | IO34_L12N | U19 | 36 | IO34_L3P | U13 |
| 37 | IO34_L12P | U18 | 38 | IO34_L3N | V13 |
| 39 | GND | – | 40 | GND | – |
| 41 | IO34_L14N | P20 | 42 | IO34_L21N | V18 |
| 43 | IO34_L14P | N20 | 44 | IO34_L21P | V17 |
| 45 | IO34_L16N | W20 | 46 | IO34_L18P | V16 |
| 47 | IO34_L16P | V20 | 48 | IO34_L18N | W16 |
| 49 | GND | – | 50 | GND | – |
| 51 | IO34_L22N | W19 | 52 | IO34_L23P | N17 |
| 53 | IO34_L22P | W18 | 54 | IO34_L23N | P18 |
| 55 | IO34_L20N | R18 | 56 | IO34_L13N | P19 |
| 57 | IO34_L20P | T17 | 58 | IO34_L13P | N18 |
| 59 | GND | – | 60 | GND | – |
| 61 | IO34_L19N | R17 | 62 | IO34_L11N | U15 |
| 63 | IO34_L19P | R16 | 64 | IO34_L11P | U14 |
| 65 | IO34_L24P | P15 | 66 | IO34_L5N | T15 |
| 67 | IO34_L24N | P16 | 68 | IO34_L5P | T14 |
| 69 | GND | – | 70 | GND | – |
| 71 | IO34_L4P | V12 | 72 | IO34_L2N | U12 |
| 73 | IO34_L4N | W13 | 74 | IO34_L2P | T12 |
| 75 | IO34_L1P | T11 | 76 | IO34_L6N | R14 |
| 77 | IO34_L1N | T10 | 78 | IO34_L6P | P14 |
| 79 | GND | – | 80 | GND | – |
| 81 | IO13_L13P | Y7 | 82 | IO13_L21P | V11 |
| 83 | IO13_L13N | Y6 | 84 | IO13_L21N | V10 |
| 85 | IO13_L11N | V7 | 86 | IO13_L14N | Y8 |
| 87 | IO13_L11P | U7 | 88 | IO13_L14P | Y9 |
| 89 | GND | – | 90 | GND | – |
| 91 | IO13_L19N | U5 | 92 | IO13_L22N | W6 |
| 93 | IO13_L19P | T5 | 94 | IO13_L22P | V6 |
| 95 | IO13_L16P | W10 | 96 | IO13_L15P | V8 |
| 97 | IO13_L16N | W9 | 98 | IO13_L15N | W8 |
| 99 | GND | – | 100 | GND | – |
| 101 | IO13_L17P | U9 | 102 | IO13_L20P | Y12 |
| 103 | IO13_L17N | U8 | 104 | IO13_L20N | Y13 |
| 105 | IO13_L18P | W11 | 106 | IO13_L12N | U10 |
| 107 | IO13_L18N | Y11 | 108 | IO13_L12P | T9 |
| 109 | GND | – | 110 | GND | – |
| 111 | FPGA_TCK | F9 | 112 | VP | K9 |
| 113 | FPGA_TMS | J6 | 114 | VN | L10 |
| 115 | FPGA_TDO | F6 | 116 | PS_POR_B | C7 |
| 117 | FPGA_TDI | G6 | 118 | FPGA_FAIA | R11 |
Fa'amauina o le laupapa i le so'oga laupapa J30
| J30 Pin | Igoa Faailoga | ZYNQ Pin
Numera |
J30 Pin | Igoa Faailoga | ZYNQ
Numera Pin |
| 1 | IO35_L1P | C20 | 2 | IO35_L15N | F20 |
| 3 | IO35_L1N | B20 | 4 | IO35_L15P | F19 |
| 5 | IO35_L18N | G20 | 6 | IO35_L5P | E18 |
| 7 | IO35_L18P | G19 | 8 | IO35_L5N | E19 |
| 9 | GND | T13 | 10 | GND | T13 |
| 11 | IO35_L10N | J19 | 12 | IO35_L3N | D18 |
| 13 | IO35_L10P | K19 | 14 | IO35_L3P | E17 |
| 15 | IO35_L2N | A20 | 16 | IO35_L4P | D19 |
| 17 | IO35_L2P | B19 | 18 | IO35_L4N | D20 |
| 19 | GND | T13 | 20 | GND | T13 |
| 21 | IO35_L8P | M17 | 22 | IO35_L9N | L20 |
| 23 | IO35_L8N | M18 | 24 | IO35_L9P | L19 |
| 25 | IO35_L7P | M19 | 26 | IO35_L6P | F16 |
| 27 | IO35_L7N | M20 | 28 | IO35_L6N | F17 |
| 29 | GND | T13 | 30 | GND | T13 |
| 31 | IO35_L17N | H20 | 32 | IO35_L16N | G18 |
| 33 | IO35_L17P | J20 | 34 | IO35_L16P | G17 |
| 35 | IO35_L19N | G15 | 36 | IO35_L13N | H17 |
| 37 | IO35_L19P | H15 | 38 | IO35_L13P | H16 |
| 39 | GND | T13 | 40 | GND | T13 |
| 41 | IO35_L12N | K18 | 42 | IO35_L14N | H18 |
| 43 | IO35_L12P | K17 | 44 | IO35_L14P | J18 |
| 45 | IO35_L24N | J16 | 46 | IO35_L20P | K14 |
| 47 | IO35_L24P | K16 | 48 | IO35_L20N | J14 |
| 49 | GND | T13 | 50 | GND | T13 |
| 51 | IO35_L21N | N16 | 52 | IO35_L11P | L16 |
| 53 | IO35_L21P | N15 | 54 | IO35_L11N | L17 |
| 55 | IO35_L22N | L15 | 56 | IO35_L23P | M14 |
| 57 | IO35_L22P | L14 | 58 | IO35_L23N | M15 |
| 59 | GND | T13 | 60 | GND | T13 |
| 61 | PS_MIO22 | B17 | 62 | PS_MIO50 | B13 |
| 63 | PS_MIO27 | D13 | 64 | PS_MIO45 | B15 |
| 65 | PS_MIO23 | D11 | 66 | PS_MIO46 | D16 |
| 67 | PS_MIO24 | A16 | 68 | PS_MIO41 | C17 |
| 69 | GND | T13 | 70 | GND | T13 |
| 71 | PS_MIO25 | F15 | 72 | PS_MIO7 | D8 |
| 73 | PS_MIO26 | A15 | 74 | PS_MIO12 | D9 |
| 75 | PS_MIO21 | F14 | 76 | PS_MIO10 | E9 |
| 77 | PS_MIO16 | A19 | 78 | PS_MIO11 | C6 |
| 79 | GND | T13 | 80 | GND | T13 |
| 81 | PS_MIO20 | A17 | 82 | PS_MIO9 | B5 |
| 83 | PS_MIO19 | D10 | 84 | PS_MIO14 | C5 |
| 85 | PS_MIO18 | B18 | 86 | PS_MIO8 | D5 |
| 87 | PS_MIO17 | E14 | 88 | PS_MIO0 | E6 |
| 89 | GND | T13 | 90 | GND | T13 |
| 91 | PS_MIO39 | C18 | 92 | PS_MIO13 | E8 |
| 93 | PS_MIO38 | E13 | 94 | PS_MIO47 | B14 |
| 95 | PS_MIO37 | A10 | 96 | PS_MIO48 | B12 |
| 97 | PS_MIO28 | C16 | 98 | PS_MIO49 | C12 |
| 99 | GND | T13 | 100 | GND | T13 |
| 101 | PS_MIO35 | F12 | 102 | PS_MIO52 | C10 |
| 103 | PS_MIO34 | A12 | 104 | PS_MIO51 | B9 |
| 105 | PS_MIO33 | D15 | 106 | PS_MIO40 | D14 |
| 107 | PS_MIO32 | A14 | 108 | PS_MIO44 | F13 |
| 109 | GND | T13 | 110 | GND | T13 |
| 111 | PS_MIO31 | E16 | 112 | PS_MIO15 | C8 |
| 113 | PS_MIO36 | A11 | 114 | PS_MIO42 | E12 |
| 115 | PS_MIO29 | C13 | 116 | PS_MIO43 | A9 |
| 117 | PS_MIO30 | C15 | 118 | PS_MIO53 | C11 |
| 119 | QSPI_D3_PS_MIO5 | A6 | 120 | QSPI_D2_PS_MIO4 | B7 |
Pepa / Punaoa
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ALINX AC7Z020 ZYNQ7000 FPGA Atina'e Komiti [pdf] Tusi Taiala AC7Z020, AC7Z020 ZYNQ7000 FPGA Development Board, ZYNQ7000 FPGA Development Board, FPGA Development Board, Development Board, Board |
